Standard-cell libraries were introduced more than 40 years ago to help IC designers keep up with the increasing complexity of IC design. But the convenience offered by predefined digital CMOS standard cells has come at the price of overall chip-level efficiency. Standard-cell-based ICs are rarely optimized for their intended application, so ICs are not as small, fast or power-efficient as they could be.

Nangate cell library creation and optimization tools provide the answer. Nangate tools enable custom tailoring of digital cell libraries to meet specific design targets. Libraries can be optimized for design goals such as power consumption, die area, operating frequency or required yield. The result: improvements in IC performance can be achieved at much lower cost and with considerably less effort than using full-custom design methods.

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